The temperature of the furnace was maintained at 900°C during the

The temperature of the furnace was maintained at 900°C during the oxidation process. To avoid cracks or warping, the wafers were placed inside the furnace at 600°C. The furnace was heated slowly with a ramp rate of +13°C/min. During the oxidation process, hydrogen and oxygen gases were used

with flow rates of 4 and 2.5 standard liters per minute (SLM), respectively. The oxidation time was 90 min. Then, W metal buy Compound Library as a bottom electrode (BE) with a thickness of approximately 200 nm was deposited by radio frequency (RF) sputtering on SiO2/Si wafers. The deposition parameters of the W layer were shown in Table  1. Then, the BE was defined and patterned by standard photolithography and wet chemical etching processes. The following parameters were used for the photolithography process. The wafer is initially heated at 120°C for 10 min in the oven

to drive off any moisture that may be present on the wafer surface. A liquid ‘adhesion promoter’ such as hexamethyldisilazane or HMDS was applied to promote adhesion of the photoresist to the wafer. A spin coater was used to coat the HMDS on the wafer. The spin coating was run at initially 3,000 rpm for 10 s and then 5,000 rpm for 20 s. Following the same process, an AZ6112 positive photoresist (AZ Electronic Materials, Branchburg, NJ, USA) was spun on the wafer to create the pattern. The photoresist-coated wafer was then prebaked to drive off excess photoresist Inhibitor Library chemical structure solvent at 90°C for 2 min. After prebaking, the sample was placed on a vacuum substrate of an optical lithography system (ABM Sales Service, San Jose, CA, USA). Then, mask 1 was placed over the sample. The photoresist was exposed to ultraviolet (UV) light for 4 s. Before developing, a postexposure bake (PEB) was performed at 90°C for 1 min to reduce the standing wave phenomena caused by the destructive and constructive interference patterns of the incident light. The wafer was immersed into the AZ330 developer (AZ Electronic Materials) for 15 s to remove the exposed photoresist and then rinsed by deionized

(DI) water. The resulting wafer was then ‘hard-baked’ to harden the final resist at 120°C for Oxalosuccinic acid 15 min. The wet chemical etching process was used to etch the uncovered W metal layer and form the W BE. A commercially available tungsten etchant (Sigma-Aldrich) was used, and the wafer was dipped into the solution for 2 to 3 min. The same photolithography process was repeated to design the 1 × 1 to 10 × 10 arrays. To pattern the switching material and TE, mask 2 was placed over the samples using a mask aligner. After the masking process, the GeO x switching material with a thickness of approximately 10 nm was deposited by the same RF sputtering system. Following this, Cu as a TE with a thickness of approximately 40 nm was deposited using a thermal evaporator. Then, the aluminum (Al) layer with a thickness of approximately 160 nm was deposited in situ by the thermal evaporator.

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